The bicycle has no rider, but its luggage rack is crowded. In Tsinghua University's photographs, electronics sit above the rear wheel while the machine travels across a running track. The 2019 demonstration brought speech recognition, object detection and tracking, balance control, obstacle avoidance, and decision-making onto a platform using one Tianjic chip.[1]
A bicycle makes an unusually persuasive computing demonstration because balance cannot wait indefinitely for perception. Several useful answers must arrive in time to become one useful action. Following Tsinghua's published work from 2019 through 2022 reveals an engineering story beneath the spectacle: first accommodate different neural networks, then give software a portable description, then arrange when those networks run.[1][2][3]
First, let different networks share the silicon
The original Tianjic research addressed a split between conventional artificial neural networks and spiking neural networks. The latter communicate through discrete events, or spikes. Tsinghua's hybrid architecture supported both kinds of computation, including combinations of them.[1]
That compatibility was the point of the bicycle. Its different functions could coexist on a common computing platform. Tsinghua also reported a first-generation software toolchain for automatic model mapping and compilation.[1]
The useful question then becomes more demanding. Even if a chip can execute each network, how should several networks divide its resources? A robot needs more than a collection of individually fast components. When one task supplies information to another, their timing becomes part of the system's behavior.
Then, make the program bigger than one chip
In October 2020, Youhui Zhang and colleagues published a proposed system hierarchy for brain-inspired computing. Their starting problem was compatibility: without a general relationship between software and hardware, programming flexibility and development productivity suffer.[2]
The researchers introduced a software abstraction and an abstract hardware architecture, with a formal property they called neuromorphic completeness. Within the proposed hierarchy, programs could be expressed uniformly and compiled into equivalent executables on hardware meeting that property. They implemented a toolchain and demonstrated different kinds of programs on multiple hardware platforms.[2]
The industrial implication is a change in what deserves attention. A striking chip demonstration can leave every subsequent application dependent on painstaking adaptation. An intermediate representation gives developers a place to describe the work before committing it to a particular machine. The paper established a framework and demonstrations; that is a different milestone from proving effortless portability across an entire commercial ecosystem.[2]
This 2020 work helps explain why the software layer belongs in the story. It should not be mistaken for a claim that all subsequent Tianjic software was interchangeable.
TianjicX adds a schedule
The June 2022 TianjicX work tackled concurrent robot tasks directly. Its organizing idea, called Rivulet, describes how a neural-network activity holds data, receives changing inputs, and occupies computing resources. Tasks can share hardware across both space and time, with configurable groups coordinating their execution.[3]
In plain terms, the design asks two questions together: which parts of the chip should do this work, and when should they do it? The answer can differ across tasks. Some activities need to coordinate; others can proceed independently. The researchers built a 28-nanometer chip and a dedicated compiler stack around that approach.[3]
Their demonstration moved from a bicycle to Tianjicat, a mobile robot playing a cat-and-mouse game. Recognizing objects, locating sounds, avoiding obstacles, and making decisions created a workload with several interacting demands.[3]
One revealing detail appears in the paper: a spiking network acts as a switch for sound processing. The system can activate a sound-localization network when appropriate, rather than treating every computation as equally necessary at every moment.[4] This makes the workload itself part of the efficiency argument. What a machine chooses to run matters alongside how quickly it runs it.
Read the speedup with its workload attached
The authors reported a 79.09-fold computation-latency improvement over an NVIDIA Jetson TX2 GPU, with dynamic power reduced by 50.66%. Those results belong to the paper's particular multi-network experiment. The TX2 comparison executes networks serially; TianjicX uses concurrent, asynchronous, event-driven execution.[4]
That boundary is essential to interpreting the result. The comparison measures a system design, including its execution strategy, against a particular implementation. It cannot establish that every neural network runs that much faster on TianjicX, or that a robot completes its entire mission that much sooner.
Data movement also appears explicitly in the evaluation. The paper distinguishes latency measurements with and without loading data and varies the TianjicX transfer conditions. Its power result concerns chip dynamic power, leaving the robot's motors, sensors, and other electronics outside that headline comparison.[4]
These qualifications sharpen the contribution: the researchers tested whether coordinating several modest networks could improve a robot's computing behavior. A peak arithmetic rating alone would not answer that question.
What this changes about reading China's AI stack
My reading of this sequence is that hardware progress becomes most useful when software can express the work the hardware was built to do. Tianjic supplied a shared home for different neural-network styles. The hierarchy research addressed program representation and compilation. TianjicX brought resource allocation and task coordination into the design.[1][2][3]
The next persuasive evidence would be independent reproductions, unfamiliar workloads, and measurements that follow the entire robot from sensing to action. Those would show how far the published gains travel beyond the demonstration.
The bicycle remains a good image to keep in mind. Its achievement looks continuous and effortless from the trackside. Inside the machine, useful intelligence depends on many smaller jobs arriving in the right order, with enough time left to steer.
Sources
- Tsinghua University, Department of Precision Instrument, "Professor Luping Shi's team published a cover paper in Nature — Towards artificial general intelligence with hybrid Tianjic chip architecture," 2019; hybrid architecture, software toolchain, and official bicycle demonstration photographs.
- Youhui Zhang et al., "A system hierarchy for brain-inspired computing," Nature 586, 378–384, October 14, 2020; software and hardware abstractions, neuromorphic completeness, and toolchain demonstrations.
- Luping Shi's Tsinghua University faculty site, "TianjicX: a neuromorphic chip with spatiotemporal elasticity for real-time multitasking at the edge," June 15, 2022; Chinese-language first-hand research announcement with English abstract.
- Songchen Ma et al., "Neuromorphic computing chip with spatiotemporal elasticity for multi-intelligent-tasking robots," Science Robotics 7, eabk2948, June 15, 2022; author-hosted full paper, especially the Tianjicat experiment and Figure 6 on latency and power.